1. Field of the Invention
The present invention relates to a microcomputer with a nonvolatile memory that needs an erasing/writing voltage for erasing and writing.
2. Background Art
Flash memories or other EEPROMs (electrically erasable programmable read only memories) are widely used as contents can be erased and written partially by electrical signals. To erase or write contents of such a nonvolatile memory, a voltage higher than that for reading is utilized usually. Alternatively, a voltage for erasing and writing, which is nearly equal to a reading voltage, is supplied to such a nonvolatile memory from a voltage supply that is different from a voltage supply for reading.
FIG. 22 is a block diagram showing an example of conventional microcomputers containing flash memories. In FIG. 22, reference numeral 1 depicts a microcomputer including a CPU (central processing unit) 2 having a program counter (PC) 3. The microcomputer 1 also includes a flash memory 4, a RAM (random-access memory) 5, and a bus 6. An erasing/writing voltage terminal 7 and a reading voltage terminal 8 are located outside the microcomputer 1.
In the microcomputer 1, the CPU 2, the flash memory 4 and the RAM 5 is interconnected via the bus 6, so that the CPU 2 exchanges information via the bus 6 with the flash memory 4 and the RAM 5.
The flash memory 4 stores various programs that the microcomputer 1 can execute, and the CPU 2 executes the programs while reading them from the flash memory 4.
The RAM 5 temporally stores data that are necessary for executing the programs. The RAM 5 is also used for executing a program for erasing or writing contents of the flash memory 4 since such a program should not be read directly from the flash memory 4 in erasing mode and writing mode. Prior to actual erasing or writing contents of the flash memory 4, the CPU 2 retrieves an erasing or writing program from the flash memory 4 and loads or stores it into the RAM 5 temporally. Then, the CPU 2 erases contents from or writes contents into the flash memory 4 while reading the erasing or writing program from the RAM 5.
The program counter 3 of the CPU 2 indicates the address of the next instruction to be executed among the running program. Consequently, the CPU 2 identifies the next address to be referred to in the storage (the flash memory 4 or the RAM 5), so that the program may be executed smoothly.
A high level voltage Vpp is supplied from the erasing/writing voltage terminal 7 to the flash memory 4 for erasing or writing contents of the flash memory 4. A low level, voltage Vcc is supplied from the reading voltage terminal 8 to the flash memory 4 for reading contents from the flash memory 4. While this specification describes that the voltage Vpp is high and the voltage Vcc is low, the voltage Vpp may be equal to the voltage Vcc. The erasing/writing voltage is needed for erasing and writing contents of the flash memory 4. Unless the erasing/writing voltage is supplied to the flash memory 4, contents of the flash memory 4 cannot be erased or written. The reading voltage is necessary for reading contents from the flash memory 4.
In order to protect contents stored in a flash memory appropriately, it is preferable that a microcomputer is provided with a prevention against false erasing or writing by malfunction. An example of such attempts is disclosed in JP-A-6-180996. A computer disclosed in this publication includes a voltage transformer (booster circuit) separated from a main assembly of the computer. The main assembly includes a connector. When the connector is connected with the voltage transformer by a human operator, an erasing/writing voltage is supplied to a flash memory located within the main assembly of the computer, so that erasing or writing can be permitted.
The above-described conventional microcomputer leads inconvenience: the human operator should connect the connector to the main assembly whenever he or she would like to erase or rewrite contents of the flash memory.
However, if no prevention is provided against false erasing or writing, an erasing/writing voltage may be supplied to a flash memory by malfunction. In this case, when the computer enters erasing or writing mode accidentally, the program may run away. In order to avoid such malfunction, a usual CPU executes an erasing/writing program while reading it from a flash memory as described above. However, malfunction may occur because of noises or other reasons.
It is therefore an object of the present invention to provide a microcomputer capable of reducing or preventing false erasing or writing of contents of a nonvolatile memory that needs an erasing/writing voltage for erasing and writing.
In accordance with the present invention, a microcomputer includes a nonvolatile memory for storing contents that can be erased from and written to the nonvolatile memory electrically when an erasing/writing voltage is supplied to the nonvolatile memory, and a processor for executing a program stored in the nonvolatile memory. The microcomputer also includes a setting element for setting a plurality of conditions for erasing contents from or writing contents into the nonvolatile memory, and an erasing/writing voltage supply enabler for enabling the erasing/writing voltage to be supplied to the nonvolatile memory when all of the plurality of conditions are satisfied.
With such a structure, when all of the plurality of conditions are satisfied, the erasing/writing voltage supply enabler enables the erasing/writing voltage to be supplied to the nonvolatile memory. Therefore, it is possible to reduce or prevent false erasing or writing of contents of the nonvolatile memory that needs the erasing/writing voltage for erasing and writing.